Novel AI Hardware Architectures for Graph Processing | Panel Discussion

What do graphs have to do with novel hardware architectures for AI workloads? Graph processing is the key to unlocking new architectures, as much as new architectures can boost execution of graph-oriented workloads. As machine learning-powered applications are proliferating, the workloads that are created in order to serve their requirements are taking up an ever increasing piece of the compute pie. An IDC study found that Data Management, Application Development & Testing, and Data Analytics workloads represented more than half of all IaaS and PaaS spending already in 2018. IDC notes that this was driven in part by initial adoption of artificial intelligence and machine learning capabilities. The rise of generative AI means that as adoption grows, data and AI workloads will dominate. This is why we see NVIDIA earnings skyrocket, as well as a renaissance of novel hardware architectures designed from the ground up to serve the needs of data and AI workloads. More specifically for data analytics, understanding relationships among data points is a challenging but essential capability. Graph analytics has emerged as an approach by which analysts can efficiently examine the structure of the large networks and draw conclusions from the observed patterns. This is why DARPA set out to develop a graph analytics processor with the HIVE Project. Furthermore, all machine learning models are best expressed as graphs. This is how machine learning libraries such as TensorFlow work. Efficient processing of graph-based networks involves large sparse data structures that consist of mostly zero values, and next generation architectures should avoid unnecessary processing. This panel explores the interrelationship between graph processing and novel AI hardware architectures. Hosted by ZDNet's Tiernan Ray with panelists from some of the most groundbreaking AI hardware companies: Blaize, Determined AI / HPE, Graphcore, and SambaNova. --- Tiernan Ray. Contributing Writer, ZDNet Tiernan Ray has been covering technology & business for 27 years. He was most recently technology editor for Barron's where he wrote daily market coverage for the Tech Trader blog and wrote the weekly print column of that name. He has also worked for Bloomberg, SmartMoney, and for the prestigious ComputerLetter newsletter covering venture capital investments in tech Val G. Cook. Chief Software Architect, Blaize Val G. Cook is Chief Software Architect at Blaize. An AI visionary and authority on the design of graphics and visual computing architectures, Val possesses two decades of experience in graphics and multimedia algorithms and software architecture. He is responsible for the Blaize Graph Streaming Processor software programming environment. Carlo Luschi. Director of Research, Graphcore Carlo is responsible for the study and development of algorithms for machine intelligence. Prior to Graphcore, Carlo was a Member of Technical Staff at Bell Labs Research, Lucent Technologies, and more recently Director of Algorithms and Standards at Icera Inc., which was acquired by NVIDIA in 2011. Raghu Prabhakar. Software Engineer, SambaNova Raghu Prabhakar is a senior principal engineer and one of the founding engineers at AI innovation platform SambaNova Systems. His research interests are in the areas of programming models, compilers, and hardware architecture for reconfigurable dataflow architectures. Evan Sparks. Founder, Determined AI, an HPE Company Evan Sparks, Vice President of Artificial Intelligence and High Performance Computing at HPE, co-founded Determined AI (now an HPE company). His group helps businesses get better AI-powered solutions to market faster and delivers the open source Determined Training Platform for large scale AI model development.