Project Vicigol - Reverse-engineering a 28-bit RISC CPU (...

What this episode covers

A while ago, I found a curious little processor and starting reverse-engineering it. Join me as I retell my journey through the Amlogic Video Decoder, from staring at bits over running hand-written instructions, to my own emulator and architecture manual. Disclaimer: "28-bit" isn't quite correct, but you'll see. Project homepage / Git repo: https://codeberg.org/neuschaefer/vicigol (will go live during GPN) Licensed to the public under https://creativecommons.org/licenses/by/4.0/ about this event: https://cfp.gulas.ch/gpn23/talk/KBQBE7/

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This episode is 43 minutes long.

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This episode was published on June 22, 2025.

What is this episode about?

A while ago, I found a curious little processor and starting reverse-engineering it. Join me as I retell my journey through the Amlogic Video Decoder, from staring at bits over running hand-written instructions, to my own emulator and architecture...

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