[043] Industry briefing - EUV The Focal Point

This post was created using AI. Please check the information if you want to use it as a basis for decision-making.This week’s episode follows High-NA EUV as it moves from readiness language toward first product evidence. ASML is pointing to memory and logic products exposed within months, while imec’s quantum-dot qubit device shows how High-NA can matter beyond conventional logic and DRAM. The focus is the manufacturing loop around High-NA: masks, inspection, curvilinear data, and qualification.Key takeaways:- ASML’s CEO said first memory and logic products exposed on High-NA EUV systems should appear within months.- imec presented a quantum-dot qubit device fabricated with High-NA EUV, with barely 6-nanometer gaps between control gates.- The episode treats imec’s quantum result as a manufacturability signal, not a near-term revenue driver.- Semiconductor Engineering’s mask discussion points to inspection, repair, curvilinear qualification, and data flow as key High-NA bottlenecks.- Micron started 1-alpha DRAM manufacturing at its Manassas, Virginia fab, adding U.S. long-lifecycle memory capacity outside the EUV-heavy HBM race.- Samsung’s tentative labor deal reduced immediate strike risk, but a later court challenge kept operational uncertainty alive.- No fresh official TSMC or Rapidus update was found this week that changed the EUV outlook.- The practical High-NA question for 2026 is which product layers produce enough yield, cost, and cycle-time evidence to justify insertion.Glossary:Extreme Ultraviolet (EUV) lithography — A 13.5-nanometer exposure technology used for the most advanced semiconductor patterning layers.High Numerical Aperture (High-NA) EUV — ASML’s next EUV generation using 0.55 NA optics for finer resolution and potentially fewer patterning steps.Low Numerical Aperture (Low-NA) EUV — Today’s 0.33 NA EUV platform, still the main production workhorse at leading fabs.Dynamic random-access memory (DRAM) — Volatile memory used in servers, personal computers, mobile devices, and high-bandwidth memory stacks.High Bandwidth Memory (HBM) — Stacked DRAM used near AI accelerators to deliver very high bandwidth.Curvilinear mask — A photomask using curved rather than strictly rectangular features to improve imaging on difficult patterns.Inverse lithography technology (ILT) — Computational method that derives mask shapes from desired wafer patterns and process behavior.Actinic inspection — Mask inspection using EUV wavelength light to better determine whether a defect will print.Edge placement error — The deviation between intended and printed feature edges, increasingly important at advanced nodes.